Authorized licensed use limited to: University of Virginia Libraries. Downloaded on June 18,2014 at 05:29:00 UTC from IEEE Xplore. Restrictions IEEE Standard for Test Access Port and Boundary-Scan ArchitectureIEEE Computer SocietySponsored by theTest Technology Standards CommitteeIEEE3 Park AvenueNew York, NY 10016-5997 USA13 May 2013IEEE Std 1149.1™-2013(Revision of IEEE Std 1149.1-2001)Authorized licensed use limited to: University of Virginia Libraries. Downloaded on June 18,2014 at 05:29:00 UTC from IEEE Xplore. Restrictions Authorized licensed use limited to: University of Virginia Libraries. Downloaded on June 18,2014 at 05:29:00 UTC from IEEE Xplore. Restrictions IEEE Std 1149.1TM-2013(Revision of IEEE Std 1149.1-2001)IEEE Standard for Test Access Port and Boundary-Scan ArchitectureSponsorTest Technology Standards Committeeof theIEEE Computer SocietyApproved 6 February 2013IEEE-SA Standards BoardAuthorized licensed use limited to: University of Virginia Libraries. Downloaded on June 18,2014 at 05:29:00 UTC from IEEE Xplore. Restrictions Abstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a boundary-scan register, such that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards. Also, a language is defined that allows rigorous structural description of the component-specific aspects of such testability features, and a second language is defined that allows ri...
