DDR布局布线规则与实例VIP专享

爱手册爱翻译 中为电子科技 1 / 23 DDR3 布局布线 译自 飞思卡尔官方文档 Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors IMX6 Serial Layout Recommendations Document revision history Date Revision Changes 2015‐02‐04 1.0 第一次撰稿 isMain elec tech studio All rights reserved Date：2015‐02‐04 Revision：1.0 Author：eco E‐mai：zhongweidianzikeji@163.com QQ：2970904654爱手册爱翻译 中为电子科技 2 / 23 目录 1. DDR 原理性连接框图 ....................................................................................................... 3 2. DDR 布局布线规则 ............................................................................................................... 4 3. DDR 布线细节 ....................................................................................................................... 5 3.1 数据线的交换 ................................................................................................................ 6 3.2 DDR3（64bits）T 型拓扑介绍 ....................................................................................... 6 3.3 DDR3（64bits）Fly‐by 型拓扑介绍 ............................................................................... 6 3.4 2GB DDR 布局布线建议 ................................................................................................. 6 3.5 4GB DDR 布局布线建议 ................................................................................................. 7 4. DDR 布局布线实例 ............................................................................................................... 8 4.1 4 片 DDR T 型拓扑实例 .................................................................................................. 8 4.2 8 片 DDR Fly‐by 型拓扑实例 ........................................................................................ 12 5. 高速信号布线...