基于FPGA的自动打铃系统的设计与实现

自动打铃系统设计说明书学 生 姓 名:罗衡学 号:14092500060专 业 班 级：电子 09—2BF报告提交日期：2024—11—28湖 南 理 工 学 院 物 电 学 院目录一、题目及要求简介···············································11.设计题目····················································12.总体要求简介················································1二、设计方案说明·················································1三、各部分功能介绍及程序·······································21.系统框图····················································22.选择的 FPGA 芯片及配置·······································23。各模块（元件）说明··········································2四、仿真结果·····················································41。计时进位····················································42。手动校时····················································53。六点整闹铃··················································5五、说明··························································51.输入激励信号说明············································52.输出结果说明················································6六、源程序························································61。顶层模块········...