基于FPGA的电子钟设计

目 录第一章 绪 论..............................................................................................................1第二章 可编程逻辑器件概述及设计方案................................................................22.1 CPLD/FPGA 概述及 VHDL 语言的特点...............................................................2可编程逻辑器件的分类和开展历程............................................................................42.3 EPF10K10LC84-4 芯片简介...................................................................................52.4 电子时钟的设计方案..............................................................................................6第三章 系统电路设计................................................................................................73.1 总体设计.................................................................................................................73.2 显示电路设计.........................................................................................................93.2.1 分频器电路..................................................................................................103.2.2 扫描电路电路..............................................................................................123.2.3 BCD 码多路选择器.....................................................................................133.2.4 BCD 译码器.................................................................................................143.2.5 位选码电路..................................................................................................153.3 电子时钟计数器电路设计....................................................................................163.3.1 秒和分计数器设计......................................................................................163.3.2 小时计数器设计..........................................................................................18总 结.......................................