基于FPGA的等精度频率计的设计VIP免费

基于FPGA的等精度频率计的设计学生姓名：罗雪晶指导教师：梁西银学生届别：2009届专业：电子信息工程班级：2005级（1）班学号：200572020121摘要本文提出了一种采用VHDL语言在FPGA（EP1C12Q240C8）平台上设计实现等精度频率计的方法。该方法设计的频率测量系统在对频率变化范围较大的信号进行频率测量时能够满足高速度、高精度的测频要求。系统的软件设计、编译、调试、仿真以及下载工作采用QuartusⅡ6.1完成。该等精度频率计的测量频率值采用VGA显示，同时显示10秒内频率的测量情况，具有良好的人机界面。关键词：FPGA、VHDL、等精度、频率计、VGAABSTRACTThispapermainlyintroducesamethodwhichusesVHDLlanguageintheFPGA(EP1C12Q240C8)platformdesignedtoachievethefrequencyaccuracy.Thismethodisdesignedfrequencymeasurementsysteminthefrequencyrangeofthesignalfrequencymeasurementstomeetthehigh-speed,high-precisionfrequencymeasurementrequirements.Systemsoftwaredesigning,compiling,debugging,simulation,anddownloadingtheworkareallcompletedbytheuseofQuartusⅡ6.1.ThesystemusesVGAdisplaytoshowthemeasuredvalueofthefrequencyofprecision,atthesametimeitshowsthefrequencyofmeasurementsin10seconds.Thisdesignhasagoodman-machineinterface.Andhasrealizedbroadbandmeasurementandcanmeettherequestofhighspeedandhighdegreeofaccuracy.KeywordsFPGA,VHDL,Precisionsurvey,frequencymeter,VGA1目录引言............................................................-3-1.原理分析......................................................-4-1.1等精度频率测量原理.......................................-4-1.2误差分析.................................................-5-2.概述..........................................................-6-2.1FPGA可编程逻辑器件......................................-6-2.2VHDL硬件描述语言........................................-7-2.3QuartusⅡ开发环境.....................................-8-2.4E-PLAY-SOPC系列开发板..................................-9-2.5EP1C12Q240C8芯片.......................................-9-2.6IPCore................................................-10-3.总体设计.....................................................-10-3.1流程图设计..............................................-10-3.2系统设计框图............................................-11-4详细设计.....................................................-13-4.1前端信号处理...........................................-13-4.2分频器的设计...........................................-13-4.3除法器的IPCore调用...................................-14-4.3.1设计中的除法器应用................................-14-4.3.2除法器IPCore的调用方法如下：...................-14-4.4译码电路的实现.........................................-15-4.5显示模块的设计实现......................................-16-4.5.1方案选择..........................................-16-4.5.2VGA接口的原理....................................-17-4.5.3VGA接口的时序分析................................-18-4.5.4VGA接口驱动波形仿真..............................-19-4.5.5VGA接口的驱动程序的设计实现......................-20-4.6系统综合及布局布线......................................-22-4.7引脚分配................................................-22-5.测试.........................................................-23-5.1测试仪器...............................................-23-5.2测试数据...............................................-24-结论...........................................................-24-致谢..............................................