1Implementation of Fast Fou rier Transform (FFT) on FPGA u sing Verilog HDL An Adv anced-VLSI-Design-Lab (AVDL) Term-Project, VLSI Engineering Cou rse, Au tu mn 2004-05, Deptt. Of Electronics & Electrical Commu nication, Indian Institu te of Technology Kharagpu r Under the guidance of Prof. Sw apna Banerjee Deptt. Of Electronics & Electrical Commu nication Engg. Indian Institu te of Technology Kharagpu r. Submitted by Abhishek Kesh (02EC1014) Chintan S.Thakkar (02EC3010) Rachit Gu pta (02EC3012) Siddharth S. Seth (02EC1032) T. Anish (02EC3014) 2 ACKNOWLEDGEMENTS It is with great reverence that we wish to express our deep gratitude towards our VLSI Engineering Professor and Faculty Advisor, Prof. Sw apna Banerjee , Department of Electronics & Electrical Communication, Indian Institute of Technology Kharagpur, under whose supervision we completed our work. Her astute guidance, invaluable suggestions, enlightening comments and constructive criticism always kept our spirits up during our work. We would be accused of ingratitude if we failed to mention the consistent encouragement and help extended by Mr. Kailash Chandra Ray, Graduate Research Assistant, during our Term-Project work. The brainstorming sessions at AVDL spent discussing various possible architectures for the FFT were very educative for us novice VLSI students. Our experience in working together has been wonderful. We hope that the knowledge, practical and theoretical, that we have gained through this term project will help us in our future endeavours in the field of VLSI. Abhishek Kesh Chintan S.Thakkar Rachit Gupta Siddharth S. Seth T. Anish 3 1. FAST FOURIER TRANSFORMS The number of complex multiplication and addition operations required by the si...
