ZynqUltraScale+RFSoCRFDataConverterv2.4Gen1/2/3LogiCOREIPProductGuideVivadoDesignSuitePG269(v2.4)November30,2020PG269(v2.4)November30,2020ZynqUltraScale+RFSoCRFDataConverterGen1/2/3www.xilinx.com2SendFeedbackTableofContentsChapter1:IPFacts.......................................................................................................................................5Features..................................................................................................................................................5IPFacts....................................................................................................................................................6Chapter2:Overview....................................................................................................................................7NavigatingContentbyDesignProcess...............................................................................................8Conventions............................................................................................................................................9RF-ADC..................................................................................................................................................12RF-DAC..................................................................................................................................................18Applications...........................................................................................................................................22LicensingandOrdering.......................................................................................................................22Chapter3:ProductSpecification............................................................................................................23Performance.........................................................................................................................................26ResourceUse.......................................................................................................................................26PortDescriptions..................................................................................................................................26RegisterSpace.....................................................................................................................................37Chapter4:DesigningwiththeCore......................................................................................................50IPCoreConfigurationintheVivadoDesignSuite.........................................................................50SoftwareDriver....................................................................................................................................50RF-ADC..................................................................................................................................................51RF-DAC..................................................................................................................................................99QuadratureModulatorCorrection....................................................................................139CoarseDelay..................................................
