ZCU102 Evaluation BoardUser GuideUG1182 (v1.6) June 12, 2019ZCU102 Evaluation Board User GuideUG1182 (v1.6) June 12, 20192Send Feedbackwww.xilinx.comRevision HistoryThe following table shows the revision history for this document.DateVersionRevision06/12/20191.6Chapter 3, Board Component Descriptions. Replaced Table 3-7. Updated HDMI Video Output in Chapter 3. Updated Figure 3-23. Updated Table 3-30 for pin B1. AddedHDMI Video Input section. Enhanced Figure A-1.01/11/20191.5Changed DDR4 72-bit to DDR4 64-bit in Figure 1-1 and PS-Side: DDR4 SODIMMSocket in Chapter 3. Removed ECC from Board Features. Updated Table 2-1, callout 2, with DDR4 SODIMM and updated the Micron part number(MTA4ATF51264HZ-2G6E1). Updated Markings.10/04/20181.4• Updated Figure 2-1 and Figure 2-2.• Added Electrostatic Discharge Caution in Chapter 2.• Updated schematic number in Table 2-1.• Updated SFP0-SFP3 functions in Table 2-3.• Updated callout in Cooling Fan Connector in Chapter 3.• Updated descriptions in PS-Side: DDR4 SODIMM Socket and PL-Side: DDR4 Component Memory in Chapter 3.• Updated Ports 0 and 4 I2C address in Table 3-23.• Added Note in SFP/SFP+ Connector in Chapter 3.• Updated Bank info in SFP+ in Chapter 3.• Updated I/O Standard for AE5 and AF5 in Table 3-52.• Updated Appendix B, Xilinx Design Constraints.• Updated Appendix C, Regulatory and Compliance Information.• Updated XTP433 and XTP435 links and added DS925 and ZCU102 Design Hub link in Appendix D, Additional Resources and Legal Notices.08/02/20171.3Updated logic cell and CLB flip-flop resource count in Table 1-1. Added Note 2 to Table 2-2. Changed maximum PL internal supply voltage from 0.875V to 0.876V inTable 3-1. Updated GTR_REF_CLK_USB3 frequency in Table 3-12. Ad...
