集成电路测试方法研究华中科技大学IC设计中心陈新武目录摘要··················································································IAbstract·················································································II1序言1.1背景及其意义····································································(1)1.2国内外研究现状·································································(3)1.3本文的主要内容·································································(5)2集成电路可测试性设计的基本概念2.1DFT的基本概念·································································(6)2.2DFT的常用方法·································································(6)2.3系统芯片与IP核·······························································(10)2.4自动测试设备（ATE）·······················································(11)2.5集成电路可测试性设计的挑战·············································(12)3边界扫描测试方法3.1边界扫描基本状况····························································(14)3.2IEEEStd1149.1·······························································(14)3.3IEEEStd1149.4································································(16)3.4IEEEStd1149.5·······························································(18)3.5IEEEStd1149.6·······························································(20)3.6边界扫描测试的发展前景···················································(22)3.7本章小结········································································(22)4全扫描可测试性实现方法4.1为什么需要扫描测试··························································(23)4.2可扫描单元类型································································(24)4.3如何提高故障覆盖率··························································(28)4.4一个实现实例··································································(41)4.5本章小结·············································...
