三星的S3C44B0X中文数据手册VIP免费

1产品预览介绍三星的S3C44B0X16/32位RISC处理器被设计来为手持设备等提供一个低成本高性能的方案。S3C44B0X提供以下配置：2.5VARM7TDMI内核带有8Kcache;可选的internalSRAM;LCDController(最大支持256色STN，使用LCD专用DMA)；2-chUARTwithhandshake(IrDA1.0,16-byteFIFO)/1-chSIO；2-chgeneralDMAs/2-chperipheralDMAswithexternalrequestpins；Externalmemorycontroller(chipselectlogic,FP/EDO/SDRAMcontroller)；5-chPWMtimers&1-chinternaltimer；WatchDogTimer；71generalpurposeI/Oports/8-chexternalinterruptsource；RTCwithcalendarfunction；8-ch10-bitADC；1-chmulti-masterIIC-BUScontroller；1-chIIS-BUScontroller；Sync.SIOinterfaceandOn-chipclockgeneratorwithPLL.。S3C44B0X采用一种新的三星ARMCPU嵌入总线结构-SAMBA2，最大达66MHZ。电源管理支持：Normal,Slow,Idle,andStopmode。系统管理功能：1Little/Bigendiansupport.2Addressspace:32Mbytespereachbank.(Total256Mbyte)3Supportsprogrammable8/16/32-bitdatabuswidthforeachbank.4Fixedbankstartaddressandprogrammablebanksizefor7banks.5.8memorybanks.-6memorybanksforROM,SRAMetc.-2memorybanksforROM/SRAM/DRAM(FastPage,EDO,andSynchronousDRAM)FullyProgrammableaccesscyclesforallmemorybanks.Supportsexternalwaitsignaltoexpendthebuscycle.Supportsself-refreshmodeinDRAM/SDRAMforpower-down.Supportsasymmetric/symmetricaddressofDRAM.Cache和内部存储器功能:4-waysetassociativeID(Unified)-cachewith8Kbyte.The0/4/8KbytesinternalSRAMusingunusedcachememory.PseudoLRU(LeastRecentlyUsed)ReplaceAlgorithm.Writethroughpolicytomaintainthecoherencebetweenmainmemoryandcachecontent.Writebufferwithfourdepth.Requestdatafirstfilltechniquewhencachemissoccurs.时钟和电源管理LowpowerTheon-chipPLLmakestheclockforoperatingMCUatmaximum66MHz.Clockcanbefedselectivelytoeachfunctionblockbysoftware.Powermode:Normal,Slow,IdleandStopmode.Normalmode:Normaloperatingmode.Slowmode:LowfrequencyclockwithoutPLLIdlemode:StoptheclockforonlyCPUStopmode:AllclocksarestoppedWakeupbyEINT[7:0]orRTCalarminterruptfromidlemode.中断控制器30Interruptsources(Watch-dogtimer,6Timer,6UART,8Externalinterrupts,4DMA,2RTC,1ADC,1IIC,1SIO)VectoredIRQinterruptmodetoreduceinterruptlatency.Level/edgemodeontheexternalinterruptsourcesProgrammablepolarityofedgeandlevelSupportsFIQ(FastInterruptrequest)forveryurgentinterruptrequest定时器功能5-ch16-bitTimerwithPWM/1-ch16-bitinternaltimerwithDMA-basedorinterrupt-basedoperationProgrammabledutycycle,frequency,andpolarityDead-zonegeneration.Supportsexternalclocksource.RTC功能:Fullclockfeature:msec,sec,min,hour,day,week,month,year.32.768KHzoperation.AlarminterruptforCPUwake-up.Timetickinterrupt通用输入输出口功能:8externalinterruptports71multiplexedinput/outputportsUART功能:2-channelUARTwithDMA-basedorinterrupt-basedoperationSupports5-bit,6-bit,7-bit,or8-bitserialdatatransmit/receiveSupportsH/Whandshakingduringtransmit/receiveProgrammablebaudrateSupportsIrDA1.0(115.2kbps)LoopbackmodefortestingEachchannelhavetwointernal32-byteFIFOforRxandTx.DMA控制器功能:2channelgeneralpurposeDirectMemoryAccesscontrollerwithoutCPUintervention.2channelBridgeDMA(peripheralDMA)controller.SupportIOtomemory,memorytoIO,IOtoIOwiththeBridgeDMAwhichhas6type'sDMArequestor:Software,4internalfunctionblocks(UART,SIO,Timer,IIS),andExternalpins.ProgrammablepriorityorderbetweenDMA...