Xavier_TRM_DP09253002_v1.3原版完整文件VIP专享

NVIDIA Xavier Series System-on-ChipTechnical Reference ManualXAVIER | TRM | DP-09253-002_v1.3p | SUBJECT TO CHANGE | NVIDIA CONFIDENTIALPage of 18512DP-09253-002ID:04-Oct-2019 19:29Date:1.3pVersion:Technical Reference ManualNVIDIA Xavier Series System-on-ChipAbstractThe Technical Reference Manual focuses on the logical organization and control of Xavier Series SoC. It provides information for those modules that interface to external devices, or those that control fundamental chip operations. The modules detailed in this document provide an overview, any necessary programming guidelines, and a register listing for that module. Internal functional units such as video and graphics hardware acceleration are controlled by NVIDIA provided software and not documented here.NVIDIA Xavier Series System-on-ChipTechnical Reference ManualXAVIER | TRM | DP-09253-002_v1.3p | SUBJECT TO CHANGE | NVIDIA CONFIDENTIALPage of 28512Table of Contents1Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.1Reading Register Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.2Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162.3Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173Memory A...