UTMI+ Low Pin Interface (ULPI) Specification Revision 1.1 October 20, 2004 UTMI+ Low Pin Interface Specification, Revision 1.1 October 20, 2004 Revision History Revision Issue Date Comment 0.9 November 12, 2003 Pre-release. 1.0rc1 January 3, 2004 Introduce PHY interface “modes”. Update interface timings. Clarify 4-bit data clocking. Clarify sending of RX CMD’s and interrupts. Introduce AutoResume feature. Route int pin to data(3) during 6-pin Serial Mode. Explain VBUS thresholds. Add T&MT diagram and updated text. Add new section to explain how PHY is aborted by Link. Various clarifications. 1.0rc2 January 13, 2004 Add block diagram. Tighten interface timing. Modify suspend protocol to more closely resemble UTMI. Add SPKR_L and SPKR_MIC to signal list and T&MT connector. Various clarifications. 1.0rc3 January 19, 2004 Specify that PHY must send RX CMD after Reset. Link + PHY clock startup time of no more than 5.6ms for a peripheral is now mandatory. PHY output delay reduced from 10ns to 9ns. Added link decision time numbers for low speed. Various Clarifications. 1.0 February 2, 2004 1.0rc3 adopted as 1.0 release. 1.1rc1 September 1, 2004 Various clarifications and fixes to hold time numbers, sending RXCMDs, FsLsSerialMode, Vbus control and monitoring, Test_J and Tesk_K signalling, Low Power Mode, Hostdisconnect, ID detection, HS SOF packets, interrupts, Carkit Mode, interface protection, No SYNC/EOP mode, linestate filtering, and AutoResume. 1.1rc2 October 4, 2004 Re-arranged text in section 3.8.7.3. Updated contributors list. 1.1 October 20, 2004 1.1rc2 adopted as 1.1 release. The present Specification has been circulated for the sole benefit of legally-recognized Promoters, Adopters and Contributors of the...
