基于 FPGA 串口通信系统设计摘要:UART(即 Universal Asynchronous Receiver Transmitter)是数据通信及控制中广泛使用的一种全双工串行数据传输协议
本设计基于 FPGA 器件实现对 UART 的波特率产生器、UART 发送器和接收器及其整合电路的模块化设计,采纳 Verilog HDL 语言对三个功能模块进行硬件描述
通过串口调试助手进行验证,其结果完全符合 UART 协议的要求和预期的结果
关键词:UART ; FPGA ; Verilog HDL ; 验证Based on FPGA serial port communications system designAbstract:UART (i
Universal Asynchronous Receiver Transmitter) is in the data communication and the control the widespread use one kind of full—duplex serial data transmission agreement
This design realizes based on the FPGA component to the UART baudrate producer, the UART transmitter and the receiver and the conformity electric circuit's modular design, uses Verilog the HDL language to carry on the hardware description to three functional modules
Debugs the assistant through