DE2引脚分配

第 27 页 共 38 页 六 附录表 DE2 平台的引脚分配表 表 6- 1 SDRAM pin assignments Signal Name FPGA Pin No. Description DRAM_ADDR[0] PIN_T6 SDRAM Address[0] DRAM_ADDR[1] PIN_V4 SDRAM Address[1] DRAM_ADDR[2] PIN_V3 SDRAM Address[2] DRAM_ADDR[3] PIN_W2 SDRAM Address[3] DRAM_ADDR[4] PIN_W1 SDRAM Address[4] DRAM_ADDR[5] PIN_U6 SDRAM Address[5] DRAM_ADDR[6] PIN_U7 SDRAM Address[6] DRAM_ADDR[7] PIN_U5 SDRAM Address[7] DRAM_ADDR[8] PIN_W4 SDRAM Address[8] DRAM_ADDR[9] PIN_W3 SDRAM Address[9] DRAM_ADDR[10] PIN_Y1 SDRAM Address[10] DRAM_ADDR[11] PIN_V5 SDRAM Address[11] DRAM_DQ[0] PIN_V6 SDRAM Data[0] DRAM_DQ[1] PIN_AA2 SDRAM Data[1] DRAM_DQ[2] PIN_AA1 SDRAM Data[2] DRAM_DQ[3] PIN_Y3 SDRAM Data[3] DRAM_DQ[4] PIN_Y4 SDRAM Data[4] DRAM_DQ[5] PIN_R8 SDRAM Data[5] DRAM_DQ[6] PIN_T8 SDRAM Data[6] DRAM_DQ[7] PIN_V7 SDRAM Data[7] DRAM_DQ[8] PIN_W6 SDRAM Data[8] DRAM_DQ[9] PIN_AB2 SDRAM Data[9] DRAM_DQ[10] PIN_AB1 SDRAM Data[10] DRAM_DQ[11] PIN_AA4 SDRAM Data[11] DRAM_DQ[12] PIN_AA3 SDRAM Data[12] DRAM_DQ[13] PIN_AC2 SDRAM Data[13] DRAM_DQ[14] PIN_AC1 SDRAM Data[14] DRAM_DQ[15] PIN_AA5 SDRAM Data[15] DRAM_BA_0 PIN_AE2 SDRAM BankAddress[0] DRAM_BA_1 PIN_AE3 SDRAM BankAddress[1] DRAM_LDQM PIN_AD2 SDRAM Low-byte DataMask DRAM_UDQM PIN_Y5 SDRAM High-byte DataMask DRAM_RAS_N PIN_AB4 SDRAM RowAddressStrobe DRAM_CAS_N PIN_AB3 SDRAM Column AddressStrobe DRAM_CKE PIN_AA6 SDRAM Clock Enable DRAM_CLK PIN_AA7 SDRAM Clock DRAM_WE_N PIN_AD3 SDRAM WriteEnable 第 28 页 共 38 页 DRAM_CS_N PIN_AC3 SDRAM ChipSelect 表 6- 2 FLASH pin assignments Signal Name FPGA Pin No. Description FL_ADDR[0] PIN_AC18 FLASH Address[0] FL_ADDR[1] PIN_AB18 FLASH Address[1] FL_ADDR[2] PIN_AE19 FLASH Address[2] FL_ADDR[3] PIN_AF19 FLASH Address[3] FL_ADDR[4] PIN_AE18 FLASH Address[4] FL_ADDR[5] PIN_AF18 FLASH...